Publications
- Resource-agnostic programming for many-core microgrids
T.A.M. Bernard, C. Grelck, M.A. Hicks, C.R. Jesshope and R. Poss
in: Proceedings of 4th Workshop on Highly Parallel Processing on a Chip (HPPC 2010), August 2010. DOI
- On the Compilation of a Language for General Concurrent Target Architectures
T.A.M. Bernard, C. Grelck, and C.R. Jesshope
in: Parallel Processing Letters, 20, (1), March 2010. DOI
- A general model of concurrency and its implementation as many-core dynamic RISC processors
T. Bernard, K. Bousias, L. Guang, C. R. Jesshope, M. Lankamp, M. W. van Tol and L. Zhang
in: IC-SAMOS 2008: Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation , p. 1-9, 2008. DOI
- Strategies for Compiling μTC to Novel Chip Multiprocessors
T.A.M. Bernard, C.R. Jesshope, and P.M.W. Knijnenburg
in: International Symposium on Systems,Architectures, MOdeling and Simulation, S. Vassiliadis et al. (Eds.): SAMOS 2007, LNCS 4599, pp.127-138, 2007. DOI
- Microthreading: model and compiler
T. Bernard, C. Jesshope, and P.M.W. Knijnenburg
in: Proceedings of Advanced Computer Architecture and Compilation for Embedded Systems, ACACES 2006, pp. 101-104, 2006.
- A Microthreaded Architecture and its Compiler
T. Bernard, K. Bousias, B. de Geus, M. Lankamp, L. Zhang, A. Pimentel, P.M.W. Knijnenburg, and C.R. Jesshope
in: Proceedings of 12th International Workshop on Compilers for Parallel Computers (CPC), M. Arenez, R. Doallo, B.B. Fraguela, and J. Tourino (eds.), pp. 326-340, 2006.
